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INTEGRATED CIRCUITS
DATA SHEET
TEA0678 Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute
Preliminary specification Supersedes data of August 1993 File under Integrated Circuits, IC01 1996 Jun 06
Philips Semiconductors
Preliminary specification
Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute
FEATURES * Dual noise reduction (NR) channels * Head pre-amplifiers * Reverse head switching * Automatic Music Search (AMS) * Mute position * Equalization with electronically switched time constants * Dolby reference level = 387.5 mV * 32 pins * Switch inputs TTL compatible * Differential output stage has: - Capability to drive 1.2 nF capacitive load - Capability to drive 1 k load - Short-circuit proof - Short-circuit proof to 16 V via coupling capacitor. * Improved EMC behaviour. GENERAL DESCRIPTION
TEA0678
The TEA0678 is a bipolar integrated circuit that provides two channels of Dolby B noise reduction for playback applications in car radios. It includes head and equalization amplifiers with electronically switchable time constants. Furthermore it includes electronically switchable inputs for tape drivers with reverse heads. This device also detects pauses of music in Automatic Music Search (AMS) mode, with a delay time fixed externally by a resistor. The short-circuit proof output stage of the TEA0678 is differential and provides muting. The device will operate with power supplies in the range of 7.6 to 12 V, output overload level increasing with increase in supply voltage. Current drain varies with supply voltage, noise reduction on/off and AMS on/off so it is advisable to use a regulated power supply or a supply with a long time constant. .Current drain varies with these variables: Supply voltage Noise reduction on/off AMS on/off. Because of this current drain variation it is advisable to use a regulated power supply or a supply with a long time constant.
QUICK REFERENCE DATA SYMBOL VCC ICC S+N ------------N supply voltage supply current signal plus noise-to-noise ratio PARAMETER - 78 MIN. 7.6 TYP. 10 25 84 MAX. 12 28 - UNIT V mA dB
ORDERING INFORMATION TYPE NUMBER TEA0678 TEA0678T PACKAGE NAME SDIP32 SO32 DESCRIPTION plastic shrink dual in-line package; 32 leads (400 mil) plastic small outline package; 32 leads; body width 7.5 mm VERSION SOT232-1 SOT287-1
Remark Dolby*: Available only to licensees of Dolby Laboratories Licensing Corporation, San Francisco, CA94111, USA, from whom licensing and application information must be obtained. Dolby is a registered trade-mark of Dolby Laboratories Licensing Corporation.
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1996 Jun 06
Vref 24 k 180 330 k 1 k 10 nF 8.2 k 470 pF 470 pF EQ switch from microprocessor LOW: 120 s OPEN: 70 s 10 F AMSout 100 nF 18 k 15 nF 26 24 22 19 20 25 23 21 18 17 270 k 27 180 k LOW: INPUT 1 HIGH: INPUT 2 from microprocessor head switch input 4.7 nF
BLOCK DIAGRAM
handbook, full pagewidth
LOW: MUTE ON HIGH: MUTE OFF from microprocessor
Philips Semiconductors
RL RL
27 k
10 F
output B-
CL
output B+
1 F
330 nF
4.7 F
4.7 F
32
31
30
29
28
EQ AMP. DOLBY B NR CIRCUIT PRE AMP.
15 k EQ DELAY TIME VCC LEVEL DETECTOR GND POWER SUPPLY
AMS
AMS PROCESSOR
TEA0678
LOGIC Vref
Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute
3
DOLBY B NR CIRCUIT EQ AMP. 6 7 15 nF 180 k 4.7 nF Rt 24 k Vref 270 k 100 nF 8 9 10 11 12 13 VCC 8.2 k 10 nF AMS delay time 330 k 1 k 180 10 F
MUTE NR
15 k
HEADSWITCH
PRE AMP.
1
2
3
4
5
14
15
16
4.7 F
4.7 F
output A-
CL
output A+
1 F
330 nF
100 F
RL RL
from microprocessor
470 pF
470 pF
LOW: NR ON OPEN: OFF HIGH: AMS ON
MED769
Preliminary specification
TEA0678
Fig.1 Block and application diagram.
Philips Semiconductors
Preliminary specification
Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute
PINNING SYMBOL OUTA- OUTA+ NR/AMS INCA OUTCA INTA CONTRA HPA SCA TD EQA EQFA VCC INA1 Vref INA2 INB2 HS INB1 GND EQFB EQB AMSEQ SCB HPB CONTRB INTB OUTCB INCB MUTE OUTB+ OUTB- PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 DESCRIPTION negative output channel A positive output channel A noise reduction/music search switch input mute/output stage channel A output Dolby B processor channel A integrating filter channel A control voltage channel A high-pass filter channel A side chain channel A delay time constant equalizing output channel A equalizing feedback channel A supply voltage input channel A1 (forward or reverse) reference voltage input channel A2 (reverse or forward) input channel B2 (reverse or forward) head switch input input channel B1 (forward or reverse) ground equalizing feedback channel B equalizing output channel B AMS output and EQ switch input side chain channel B high-pass filter channel B control voltage channel B integrating filter channel B output Dolby B processor channel B input mute/output stage channel B mute switch positive output channel B negative output channel B Fig.2 Pin configuration.
EQFA 12 VCC 13 INA1 14 Vref 15 INA2 16
MED770
TEA0678
handbook, halfpage
OUTA- OUTA+ NR/AMS INCA OUTCA INTA CONTRA HPA SCA
1 2 3 4 5 6 7 8
32 OUTB- 31 OUTB+ 30 MUTE 29 INCB 28 OUTCB 27 INTB 26 CONTRB 25 HPB
TEA0678
9 24 SCB 23 AMSEQ 22 EQB 21 EQFB 20 GND 19 INB1 18 HS 17 INB2 TD 10 EQA 11
1996 Jun 06
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Philips Semiconductors
Preliminary specification
Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute
FUNCTIONAL DESCRIPTION Noise Reduction (NR) is enabled when pin NR/AMS is connected to ground and disabled when open-circuit (left floating from a 3-state output). Dolby noise reduction only operates correctly if 0 dB Dolby level is adjusted at 387.5 mV. Automatic Music Search (AMS) is enabled when pin NR/AMS is connected to HIGH (5 V) and disabled when open-circuit (left floating from a 3-state output). In AMS mode the signal of both channels are rectified and then added. This means, even if one channel signal appears inverted to the other channel, with the TEA0678 the normal AMS function is ensured (see Figs 4, 5 and 6). Equalization time constant switching (70 s or 120 s) is achieved when pin AMSEQ is connected to GND via an 18 k resistor (120 s), or left open-circuit (70 s). This does not affect the AMS output signal during AMS mode (see Fig.1).
TEA0678
Head switching is achieved when pin HS is connected to GND (input IN1 active) or connected to HIGH (5 V) level (input IN2 active). If left open-circuit IN1 is active. Mute is enabled when pin MUTE is connected to ground and off when connected to HIGH (5 V) level. For smooth switching a time constant is recommended. If left open-circuit MUTE is active. The differential output stage of each channel is connected via a provision to the Dolby and pre-amplifier part. This provision may be used for any processing of the tape signal or to add another signal. Each output drives a resistive load of nominal 10 k and is capable of driving 1 k, also a capacitive load of 1.2 nF to ground and between differential outputs. Each output can be short-circuited to a battery (16 V) via a coupling capacitor (4.7 F).
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134); note1. SYMBOL VCC Vi supply voltage input voltage (pins 1 to 32) except pin 15 (Vref); pin 3 (NR/AMS), pin 18 (HS) and pin 30 (MUTE) to VCC input voltage at pin 3 (NR/AMS), pin 18 (HS) and pin 30 (MUTE) tshort Tstg Tamb Ves pin 15 (Vref) to VCC short-circuiting duration storage temperature operating ambient temperature electrostatic handling voltage for all pins note 3 note 4 Notes 1. The device may not operate correctly when subjected to these ratings when the ratings exceed the electrical characteristics of the device as specified in Chapter "Characteristics". The device will recover automatically when the environment is reduced to the requirements of the characteristics. 2. The TEA0678 allows a HIGH-level at switching pins without supply voltage (VCC = 0; stand-by mode). This means a maximum input voltage of 6.5 V for the switching input pins. 3. Human body model (1.5 k, 100 pF). 4. Machine model (0 , 200 pF). note 2 PARAMETER CONDITIONS 0 -0.3 -0.3 - -55 -40 -2 -500 MIN. MAX. 16 +VCC +6.5 5 +150 +85 +2 +500 V V V s C C kV V UNIT
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Philips Semiconductors
Preliminary specification
Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute
TEA0678
CHARACTERISTICS VCC = 10 V; f = 20 Hz to 20 kHz; Tamb = 25 C; nominal load 10 k; all levels are referenced to 775 mV (RMS) (0 dB) at differential outputs (Vo = Vo+ - Vo-), this corresponds to Dolby level 387.5 mV (RMS) (0 dB) at test point (OUTC); see Fig.1; NR on/AMS off; EQ switch in the 70 s position; unless otherwise specified. SYMBOL VCC ICC PARAMETER supply voltage supply current pins 14, 16, 17 and 19 connected to Vref f = 1 kHz; Vo = 0 dB at each output m Gv Gmm THD HR S+N ------------N Vno(rms) PSRR channel matching voltage gain (output stage) voltage gain mismatch (output stage) total harmonic distortion (2nd and 3rd harmonic) headroom at output signal plus noise-to-noise ratio f = 1 kHz; Vo = 0 dB; NR off; OUTA/OUTB CONDITIONS MIN. 7.6 - - -0.5 TYP. 10 25 26 - 6 - 0.08 0.15 - 84 MAX. UNIT 12 28 37 +0.5 6.5 +0.5 0.15 0.3 - - V mA mA dB dB dB % % dB dB
between OUT and OUTC; f = 1 kHz; 5.5 NR off mismatch between OUT+ and OUT-; f = 1 kHz; NR off f = 1 kHz; Vo = 0 dB f = 10 kHz; Vo = 6 dB VCC = 9 V; THD = 1%; f = 1 kHz -0.5 - - 13
internal gain 40 dB; linear; 78 CCIR/ARM weighted; decode mode; see Fig.10 - 52 49 -22.9 -1.5 -17.8 -18.1 -24.4 61 70 10 1 0.3
equivalent input noise voltage NR off; unweighted; in decode mode (RMS value) f = 20 Hz to 20 kHz; Rsource = 0 power supply ripple rejection Vi(rms) = 0.25 V; f = 1 kHz; see Fig.7 for unsymmetrical signal at OUTC at differential OUT; note 1 see Fig.10 Vo = -25 dB; f = 0.2 kHz Vo = 0 dB; f = 1 kHz Vo = -25 dB; f = 1 kHz Vo = -25 dB; f = 5 kHz Vo = -35 dB; f = 10 kHz
- 57 52 -24.4 0 -19.3 -19.6 -25.9 67 77 - - -
1.4 - -
V dB dB
fo
frequency response measured in encode mode; referenced to TP
-25.9 dB +1.5 dB -20.8 dB -21.1 dB -27.4 dB - - - - 1.3 dB dB k k nF
cs cc RL
channel separation crosstalk between active and inactive input
Vo = +10 dB; f = 1 kHz; see Fig.8 NR off; f = 1 kHz; Vo = +10 dB; see Fig.8
load resistance at each output AC-coupled f = 1 kHz; Vo = 12 dB; OUTA+, OUTA-, OUTB+ and THD = 1% OUTB- (corresponds to 2 k THD = 1%; note 2 at differential output) capacitive load at each output CLmin at each output to ground (between OUT+ and OUT-) (pins 1, 2, 31 and 32) and ground voltage gain of pre-amplifier from pin INA1 or INA2 to pin EQFA and from pin INB1 or INB2 to pin EQFB; f = 1 kHz
CL
Gv
29
30
31
dB
1996 Jun 06
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Philips Semiconductors
Preliminary specification
Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute
SYMBOL VI(offset)(DC) Ii(bias) REQ RI Av PARAMETER DC input offset voltage input bias current equalization resistor input resistance head inputs open-loop amplification pin INA1 or INA2 to pin EQA and pin INB1 or INB2 to pin EQB f = 10 kHz f = 400 Hz VO(offset)(DC) Vmute(offset) DC offset voltage at pins OUT+ to OUT- MUTE offset voltage at pins OUT+ to OUT- pins INA1, INA2, INB1 and INB2 connected to Vref pins INA1, INA2, INB1 and INB2 connected to Vref NR off; pins INA1, INA2, INB1 and INB2 connected to Vref pins INA1, INA2, INB1 and INB2 connected to Vref pin OUTC to ground pin OUTC to VCC pin OUT to ground pin OUT to VCC Ri Zo input resistance output stage at pins INCA and INCB output impedance at each output OUTA+, OUTA-, OUTB+ and OUTB- mute depth at differential output NR off f = 1 kHz f = 10 kHz AMSL AMSH td tr EMC AMS threshold level at music to pause AMS threshold level at pause to music AMS delay time range AMS rise/delay time DC offset voltage at pins OUTA-, OUTA+, OUTB+ and OUTB- NR off; f = 10 kHz; see Fig.9 note 3 f = 10 kHz; 0 dB burst; see Table 1 f = 10 kHz; 0 dB burst f = 900 MHz; Vi = 3 V(RMS); see Figs 11, 12 and13 -80 -80 -25 -24 - 2 - - - -22 -21 -2 0.3 -2.5 2.5 10 - - - - - 16 90 80 104 -10 -10 -0.15 86 110 - - - CONDITIONS MIN. - - 4.7 60 2 - 5.8 100 TYP.
TEA0678
MAX. UNIT - 0.4 6.9 - mV A k k
- - +10 +10
dB dB mV mV
Vref - VOUTC DC output offset voltage at pins OUTCA and OUTCB IO DC output current
+0.15 V
- - - - - 110
mA mA mA mA k
dmute
- - -19 -18
dB dB dB dB ms ms mV
23 to 160 - - 100 10 -
1996 Jun 06
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Philips Semiconductors
Preliminary specification
Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute
SYMBOL PARAMETER CONDITIONS MIN. TYP.
TEA0678
MAX. UNIT
Switching thresholds NR/AMS SWITCH (PIN 3) VIL IIL Ii(float) Vfloat VIH IIH IEQ70 VEQ70 IEQ120 VOH IOH IOH VOL IOL VIL IIL VIH IIH LOW level input voltage LOW level input current allowed floating input current floating voltage HIGH level input voltage HIGH level input current NR on NR on pin left open-circuit; NR/AMS off pin left open-circuit; NR/AMS off AMS on AMS on time constant 70 s active time constant 70 s active time constant 120 s active music present current capability current capability; note 4 music not present current capability -0.3 -10 -10 - 4 10 - -20 0 2.4 - 20 +0.8 -40 +10 5 5.5 40 V A A V V A
EQUALIZATION (PIN 23) floating leakage current floating voltage input current +0.002 - - -0.25 4 +0.01 +0.01 - -0.01 -0.3 - 4 - 4.6 - 4.6 - - - - - -4 - 10 -0.15 mA 5 -1 5 -1 0.8 +1 V mA
AMS OUTPUT (PIN 23) HIGH level output voltage HIGH level output current HIGH level output current LOW level output voltage LOW level output current V mA V mA
-0.15 mA
MUTE SWITCH (PIN 30) LOW level input voltage LOW level input current HIGH level input voltage HIGH level input current MUTE on MUTE on MUTE off MUTE off; smooth switching with a time constant is recommended +0.8 -100 5.5 100 V A V A
HEAD SWITCH (PIN 18) VIL IIL VIH IIH LOW level input voltage LOW level input current HIGH level input voltage HIGH level input current INPUT 1 on INPUT 1 on INPUT 2 on INPUT 2 on -0.3 - 4 - - - - 30 +0.8 -100 5.5 100 V A V A
1996 Jun 06
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Philips Semiconductors
Preliminary specification
Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute
Notes to the characteristics
TEA0678
1. For the signal to be doubled (+6 dB) at differential output as a function of OUTC, the signal-to-ripple ratio is improved at differential output for approximately 3 dB. 2. By using the small load, the output voltage may be divided by -0.8 dB. 3. The high speed of the tape (FF, REW) at the tape head during AMS mode causes a transformation of level and frequency of the originally recorded signal. It means a boost of signal level of approximately 10 dB and more for recorded frequencies from 500 Hz up to 4 kHz. So the threshold level of -22 dB corresponds to signal levels in PB mode of approximately -32 dB. The AMS inputs for each channel are pin SCA and pin SCB. As the frequency spectrum is transformed by a factor of approximately 10 to 30 due to the higher tape speed in FF, REW, the high-pass filter (4.7 nF/24 k) removes the effect of offset voltages but does not affect the music search function. In the application circuit (Fig.1) the frequency response of the system between tape heads input, e.g. pins INA2/INB2, to the AMS input pins SCA and SCB is constant over the whole frequency range (see Fig.3). The frequency dependence of threshold level is shown in Fig.3. 4. In AMS OFF mode, pin AMSEQ is HIGH level, the equalization time constant will be switched by pulling approximately 200 A out of pin AMSEQ. This means for the device connected to pin AMSEQ, a restriction of input current at HIGH level less than 200 A during AMS off; otherwise the switching of the time constants is disabled but fixed at 120 s. If the following devices, input consumes more than 200 A, this input has to be disconnected in AMS off mode. (To ensure switching the currents for the different switched modes are specified with a tolerance of 50 A in Chapter "Characteristics".) For an application with a fixed EQ time constant of 120 s the equalizing network may be applied completely external. Change 8.2 k resistor to 14 k the internal resistor REQ = 5.8 k is short-circuited by fixing the EQ switch input at the 70 s position (IEQ70). Table 1 Blank delay time set by resistor Rt at pin TD RESISTOR VALUE Rt (k) 68 150 180 220 270 330 470 560 680 820 1000 DELAY TIME td TYP. (ms) 23 42 48 56 65 76 98 112 126 142 160 TOLERANCE (%) 20 15 15 15 10 10 10 10 10 10 10
1996 Jun 06
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Philips Semiconductors
Preliminary specification
Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute
General note
TEA0678
It is recommended to switch off VCC with a gradient of 400 V/s at maximum to avoid plops on tape in the event of contact between tape and tape head while switching off.
handbook, full pagewidth
-20
MED623
(1)
(dB) -30
-40
(2)
-50
-60 102
103
104
(Hz)
105
(1) AMS threshold level for application circuit (Fig.1). (2) AMS threshold level for test circuit (Fig.9).
Fig.3 AMS threshold level.
General note on AMS The speed of tape at the tape head during FF, REW depends on the diameter of the tape on the spindle. Depending on this speed, the recorded signal occurs transformed in frequency and magnitude as a function of the original signal in playback mode speed. For example: A recorded pause of 3 s passes the tape head at its highest speed in 111 ms, e.g. during FF mode near tape end. This time constant of 111 ms corresponds to a pause of 1.3 s at the beginning of the tape in playback mode.
Thus a pause T is uniquely defined outside the interval 1.3 s < T < 3 s. Inside this interval T will be recognized as a pause or not dependent on the local point of tape, respectively the speed of tape. Times of pauses described investigated for this document are valid for tape devices 1 with a speed of its spindle (FF, REW): r = 51 -s respectively 12 to 27 times of the playback speed.
1996 Jun 06
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Philips Semiconductors
Preliminary specification
Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute
Short description `music search' A system for `music search' mainly consists of a level and a time detection (see Fig.4). For adapting and decoupling the input signal will be amplified (A), then rectified (B) and smoothed with a time constant (C). So the voltage at (C) corresponds to the signal level and will be compared to the predefined pause level at the first comparator (D), the level detector. If the signal level becomes smaller than the pause level, the level detector(D) changes its output signal. Due to the output level of the level detector the
TEA0678
capacitor of the second time constant (E) will be charged, respectively discharged. If the pause level of the input signal remains for a certain time, the voltage at the capacitor reaches a certain value, which corresponds to an equivalent time value due to the charging. The voltage at the capacitor will be compared to a predefined time-equivalent voltage by the second comparator (F), the time detector. If the pause level of the input signal remains for this predefined time, the time detector (F) changes its output level for `pause found' status.
handbook, full pagewidth
(A)
(B)
INA
(C)
(D)
COMPARATOR 1
(E)
(F)
COMPARATOR 2
AMPLIFIER
RECTIFIER
t1
VI
t2
Vt
OUT
INB LEVEL DETECTOR TIME DETECTOR
MED772
Fig.4 Integrated `music search' function.
In this IC the signals of both channels are first rectified and then added. The signal behind the adder is described by Vadd = VchanA + VchanB, where: VchanA: absolute value channel A VchanB: absolute value channel B This means, even if one channel signal appears phase shifted to the other channel (at worst cases inverted), the TEA0678 will ensure the normal AMS function.
1996 Jun 06
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Philips Semiconductors
Preliminary specification
Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute
TEA0678
Description of the principle timing diagram for AMS-scan mode without initial input signal (see Fig.5)
tr: rise pagewidth handbook, full time td: delay time tb: burst time tp: pause time tf: fall time tr tbAMS on
td tf
tpVin t
Vl Vl: voltage at level detector input pin 7 (CONTRA) t Vt upper threshold (hysteresis) Vt: voltage at time detector input pin 26 (CONTRB)
level threshold VREF
time threshold
t VAMSEQ 4.5 V output signal to microprocessor t0 t3 t4 t5 t6 t7 t8 t9 t10 t11 t12 t13 t14 t15 t
MED773
Fig.5 AMS-scan mode without initial input signal.
By activating AMS-scan mode, the AMS output level directly indicates whether the input level corresponds to a pause level (VAMSEQ = LOW) or not (VAMSEQ = HIGH). At t0 the AMS-scan mode is activated. Without a signal at Vin, the following initial procedure runs until the AMS output changes to LOW level: due to no signal at Vin the voltage at the level detector input VI (pin 7, CONTRA) remains below the level threshold and the second time constant will be discharged (time detector input Vt). When Vt passes the time threshold level, the time detector output changes to LOW level. Now the initial procedure is completed. If a signal burst appears at t3, the level detector input voltage rises immediately and causes its output to charge the second time constant, which supplies the input voltage Vt for the time detector. When Vt passes the upper
threshold level after the rise time tr (at t4), the AMS output changes to HIGH. If the signal burst ends at t5 the level detector input VI falls to its LOW level. When passing the level threshold at t6, the discharging of the second time constant begins. Now the circuit measures the delay time td, which is externally fixed by a resistor and defines the length of a pause to be detected. If no signal appears at Vin within the time interval td, the time detector output switches the AMS output to LOW level at t7. If a plop noise pulse appears at Vin (t8) with a pulse width less than the rise time tr > tb, the plop noise will not be detected as music. The AMS output remains LOW. Similarly the system handles `no music pulses' tp: when music appears at t11 with a small interruption at t13, this interruption will not affect the AMS output for tp < td.
1996 Jun 06
12
Philips Semiconductors
Preliminary specification
Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute
TEA0678
Description of the principle timing diagram for AMS-scan mode with initial input signal (see Fig.6)
tr: rise pagewidth handbook, fulltime AMS on
td: delay time tb: burst time tp: pause time Vin tf: fall time
td tf
tbtpt
Vl Vl: voltage at level detector input pin 7 (CONTRA) t Vt upper threshold (hysteresis) Vt: voltage at time detector input pin 26 (CONTRB)
level threshold VREF
time threshold
t VAMSEQ 4.5 V output signal to microprocessor t t0 t1 t5 t6 t7 t8 t9 t10 t11 t12 t13 t14 t15
MED774
Fig.6 AMS-scan mode with initial input signal.
At t0 the AMS-scan mode is activated. With an input signal at Vin, the following initial procedure runs until the circuit gets a steady state status. Due to the signal at Vin the voltage at the level detector input VI (pin 7, CONTRA) slides to a value which is defined by a limiter. This voltage causes the level detector output charging the second time constant (time detector input Vt) to its maximum voltage level at t1. Now the initial procedure is completed.
The following behaviour does not differ from the description in Section "Description of the principle timing diagram for AMS-scan mode without initial input signal (see Fig.5)".
1996 Jun 06
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handbook, full pagewidth
1996 Jun 06
Vref 24 k AMSout 10 F EQ 70 s 10 k 180 k 18 k 20 k 270 k 15 nF 25 24 23 22 20 19 21 18 17 27 26 LOW: INPUT 1 HIGH: INPUT 2 from microprocessor 4.7 nF 100 nF DOLBY B NR CIRCUIT EQ AMP. PRE AMP. AMS GND DELAY TIME POWER SUPPLY VCC LEVEL DETECTOR Vref AMS PROCESSOR
HIGH: MUTE OFF from microprocessor
Philips Semiconductors
RL
RL
27 k
10 F
output B-
CL
output B+
1 F
330 nF
4.7 F
4.7 F
TEST AND APPLICATION INFORMATION
32
31
30
29
28
15 k EQ
TEA0678
LOGIC
MUTE NR
Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute
14
DOLBY B NR CIRCUIT EQ AMP. 6 7 15 nF 20 k 180 k Rt 270 k 100 nF 8 9 10 11 12 13 VCC = 10 V 10 k AMS delay time 100 nF 10 F 24 k Vref 0.25 V RMS 1 kHz 1000 F 4.7 nF
15 k
HEADSWITCH
PRE AMP.
1
2
3
4
5
14
15
16
4.7 F
4.7 F
output A-
CL
output A+
1 F
330 nF
10 k
100 F
ON
RL
RL
NR
LOW: NR ON
MED775
Preliminary specification
TEA0678
Fig.7 Test circuit for power supply ripple rejection.
andbook, full pagewidth
1996 Jun 06
Vref 24 k AMSout 10 F LOW: INPUT 1 HIGH: INPUT 2 from microprocessor 4.7 nF 10 k 100 nF 180 k 18 k 20 k 270 k 27 26 24 22 19 20 23 21 17 25 18 15 nF EQ 70 s DOLBY B NR CIRCUIT EQ AMP. PRE AMP. AMS LOGIC EQ DELAY TIME VCC HEADSWITCH LEVEL DETECTOR POWER SUPPLY GND Vref AMS PROCESSOR
HIGH: MUTE OFF
from microprocessor
Philips Semiconductors
RL
RL
27 k
10 F
output B-
CL
output B+
1 F
330 nF
4.7 F
4.7 F
32
31
30
29
28
15 k
TEA0678
MUTE NR
Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute
15
DOLBY B NR CIRCUIT EQ AMP. 6 7 15 nF 180 k 4.7 nF 24 k Rt 270 k 100 nF 8 9 10 11 12 13 20 k 10 k 100 nF AMS delay time 10 F Vref
15 k
PRE AMP.
1
2
3
4
5
14 VCC = 10 V
15
16
4.7 F
4.7 F
output A-
CL
output A+
ON
1 F
330 nF
10 F 470 pF 10 V
100 F 200
NR
RL
RL
LOW: NR ON
MED776
Preliminary specification
TEA0678
Fig.8 Test circuit for channel separation.
1996 Jun 06
handbook, full pagewidth
Vref 24 k 10 F AMSout 4.7 nF 100 nF 180 k 18 k 15 nF 25 24 23 22 19 20 17 21 18 20 k 270 k 27 26 10 k EQ 70 s LOW: INPUT 1 HIGH: INPUT 2 from microprocessor DOLBY B NR CIRCUIT EQ AMP. PRE AMP. AMS GND DELAY TIME POWER SUPPLY VCC LEVEL DETECTOR Vref AMS PROCESSOR
HIGH: MUTE OFF from microprocessor
Philips Semiconductors
RL
RL
27 k
10 F
output B-
CL
output B+
1 F
330 nF
4.7 F
4.7 F
32
31
30
29
28
15 k EQ
TEA0678
voltage input
LOGIC
Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute
16
DOLBY B NR CIRCUIT EQ AMP. 6 7 15 nF 180 k 4.7 nF Rt 270 k 100 nF 8 9 10 11 12 13 20 k 100 nF AMS delay time 10 k Vref 24 k 10 F
MUTE NR
15 k
HEADSWITCH
PRE AMP.
1
2
3
4
5
14 VCC = 10 V
15
16
4.7 F
4.7 F
output A-
CL
output A+
1 F
330 nF
100 F
RL
RL
HIGH: AMS ON
5V
MED777
Preliminary specification
TEA0678
Fig.9 Test circuit for AMS threshold level.
1996 Jun 06
handbook, full pagewidth
Vref AMSout 25 k TP 10 F Vi 10 k 20 k 25 k EQ 70 s 10 F 18 k VCC LOW: INPUT 1 HIGH: INPUT 2 from microprocessor 100 nF 180 k 24 k 15 nF 26 24 22 20 19 25 23 21 18 17 4.7 nF 270 k 27 DOLBY B NR CIRCUIT EQ AMP. PRE AMP. AMS LOGIC EQ DELAY TIME VCC LEVEL DETECTOR GND POWER SUPPLY Vref AMS PROCESSOR
HIGH: MUTE OFF from microprocessor
Philips Semiconductors
RL
RL
27 k
10 F
output B-
CL
output B+
1 F
330 nF
4.7 F
4.7 F
32
31
30
29
28
15 k
TEA0678
Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute
17
HEADSWITCH DOLBY B NR CIRCUIT EQ AMP. 6 7 270 k 15 nF 4.7 nF 100 nF 180 k 24 k Rt 8 9 10 11 12 13 VCC = 10 V 20 k 10 k 10 V 10 F Vref TP 100 nF AMS delay time
MUTE NR
15 k
HEAD
PRE AMP.
1
2
3
4
5
14
15
16
4.7 F
4.7 F
output A-
CL
output A+
1 F
ON
330 nF
10 F Vi
470 pF
200
100 F
NR
RL
RL
LOW: NR ON
MED778
Preliminary specification
TEA0678
Fig.10 Test circuit for frequency response (channel B, encode mode).
VCC
andbook, full pagewidth
1996 Jun 06
Vref 24 k 4.7 nF 100 nF 180 k 20 k 15 nF 25 24 23 22 19 20 21 18 17 200 470 pF 200 470 pF 270 k 27 26 10 k DOLBY B NR CIRCUIT EQ AMP. PRE AMP. AMS LOGIC EQ DELAY TIME VCC HEADSWITCH LEVEL DETECTOR GND POWER SUPPLY Vref AMS PROCESSOR
5 k
5 k
Philips Semiconductors
27 k
10 F
4.7 F
4.7 F
330 nF
32
31
30
29
28
15 k
TEA0678
MUTE NR
Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute
18
DOLBY B NR CIRCUIT EQ AMP. 6 7 15 nF 180 k 4.7 nF 24 k 270 k 100 nF 8 9 10 11 12 13 20 k 68 k 10 k AMS delay time 100 nF
15 k
PRE AMP.
1
2
3
4
5
14 VCC = 10 V
15
16
4.7 F
4.7 F
100 F 200 470 pF 200 470 pF
330 nF
10
MBH478
40
Preliminary specification
TEA0678
Fig.11 EMC test circuit.
Philips Semiconductors
Preliminary specification
Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute
LAYOUT OF PRINTED-CIRCUIT BOARD FOR EMC TEST CIRCUIT (FOR TEA0678T)
l pagewidth
TEA0678
72
68
40 10 0 0 0 0
470 pF 200 470 pF 200 10 k 20 20 68 k k TEA0678T k 15 nF 15 nF 4.7 nF 4.7 nF 100 nF 100 nF 270 270 k k 470 pF 200 470 pF 200 10 k 27 k 5 k 5 k 100 nF
MBH462
Dimensions in mm.
Fig.12 Top side with components.
1996 Jun 06
19
Philips Semiconductors
Preliminary specification
Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute
TEA0678
l pagewidth
68
72
X5
X3 4.7 F 4.7 F 24 k MP MP 330 nF X1 100 F S1 330 nF MP MP 24 k 4.7 F X2 4.7 F MP MP 180 k 100 F X5 180 k MP
X4
MBH461
Dimensions in mm.
Fig.13 Bottom side with components.
1996 Jun 06
20
Philips Semiconductors
Preliminary specification
Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute
PACKAGE OUTLINES SDIP32: plastic shrink dual in-line package; 32 leads (400 mil)
TEA0678
SOT232-1
D seating plane
ME
A2 A
L
A1 c Z e b 32 17 b1 wM (e 1) MH
pin 1 index E
1
16
0
5 scale
10 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 4.7 A1 min. 0.51 A2 max. 3.8 b 1.3 0.8 b1 0.53 0.40 c 0.32 0.23 D (1) 29.4 28.5 E (1) 9.1 8.7 e 1.778 e1 10.16 L 3.2 2.8 ME 10.7 10.2 MH 12.2 10.5 w 0.18 Z (1) max. 1.6
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT232-1 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION
ISSUE DATE 92-11-17 95-02-04
1996 Jun 06
21
Philips Semiconductors
Preliminary specification
Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute
TEA0678
SO32: plastic small outline package; 32 leads; body width 7.5 mm
SOT287-1
D
E
A X
c y HE vM A
Z 32 17
Q A2 A1 pin 1 index Lp 1 e bp 16 wM L detail X (A 3) A
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 2.65 0.10 A1 0.3 0.1 A2 2.45 2.25 A3 0.25 0.01 bp 0.49 0.36 0.02 0.01 c 0.27 0.18 0.011 0.007 D (1) 20.7 20.3 0.81 0.80 E (1) 7.6 7.4 0.30 0.29 e 1.27 0.050 HE 10.65 10.00 0.42 0.39 L 1.4 0.055 Lp 1.1 0.4 0.043 0.016 Q 1.2 1.0 0.047 0.039 v 0.25 0.01 w 0.25 0.01 y 0.1 0.004 Z (1) 0.95 0.55 0.037 0.022
0.012 0.096 0.004 0.086
8o 0o
Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT287-1 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION
ISSUE DATE 92-11-17 95-01-25
1996 Jun 06
22
Philips Semiconductors
Preliminary specification
Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute
SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "IC Package Databook" (order code 9398 652 90011). SDIP SOLDERING BY DIPPING OR BY WAVE The maximum permissible temperature of the solder is 260 C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg max). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. REPAIRING SOLDERED JOINTS Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 C, contact may be up to 5 seconds. SO REFLOW SOLDERING Reflow soldering techniques are suitable for all SO packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement.
TEA0678
Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 C. WAVE SOLDERING Wave soldering techniques can be used for all SO packages if the following conditions are observed: * A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. * The longitudinal axis of the package footprint must be parallel to the solder flow. * The package footprint must incorporate solder thieves at the downstream end. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260 C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 C within 6 seconds. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. REPAIRING SOLDERED JOINTS Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
1996 Jun 06
23
Philips Semiconductors
Preliminary specification
Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute
DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
TEA0678
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
1996 Jun 06
24
Philips Semiconductors
Preliminary specification
Dual Dolby* B-type noise reduction circuit, automatic music search, with differential
NOTES
TEA0678
1996 Jun 06
25
Philips Semiconductors
Preliminary specification
Dual Dolby* B-type noise reduction circuit, automatic music search, with differential
NOTES
TEA0678
1996 Jun 06
26
Philips Semiconductors
Preliminary specification
Dual Dolby* B-type noise reduction circuit, automatic music search, with differential
NOTES
TEA0678
1996 Jun 06
27
Philips Semiconductors - a worldwide company
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For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1996
Internet: http://www.semiconductors.philips.com/ps/ (1) ADDRESS CONTENT SOURCE July 29, 1996 SCA49
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands
517021/1200/02/pp28 Date of release: 1996 Jun 06 Document order number: 9397 750 00896

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